Would love to, but the only Array tile currently supported on IC chips are Null Cells. There is also currently a bug with IC gates that causes my 4:16 demux solution using buffer and inverter gates to get stuck on world reload.
The smaller 1x4 array on the left represents the 4 most significant bits of the address. A layer of AND cells was added to the start of the decoder. A buffer gate was placed facing the first row of the decoder to account for the fact that it remains off if the decoder is not given any inputs. This essentially prevents the entire decoder from updating if it is not currently relevant to the address.
Ive done similar builds like this...and i find this pattern useful:
build 2x 4-16 decoders. first for lower 4 bits of address, 2nd for high 4 bits
assuming 16 banks of 16 memory slots, use bus transceivers on the output lines of each bank.
connect the high decoder outputs to those transceivers (bank 0 gets white output, bank 1 gets orange output, etc). mirror the lower decoder outputs to all the banks to select memory cells, but tie the read/clock lines on each memory cell to gates that AND the lower decoder signals with the hi bank selector.
That's it. And you only need 2 decoders to handle that. Add another decoder to handle another 4 bits, and then you would need an and gate on all those transceivers to do a block (16 bank) selector. you get the idea. you dont need to do a decoder per bank of 16 memory cells, that's just asking for a slideshow
on a different topic...I found a very cool use for block breakers/placers:
This is a binary counter with up/down/load/clear functions. The zigzag line running up the back is the clock signal. if an orange block is cutting that wire, that stage of the counter (and all others above it) doesn't toggle. when it does toggle it either removes or places that block. Why use placers/breakers? Because they place/break blocks instantly, making the outputs *perfectly synced*. There is no propagation delay between the bits. And its only 3 ticks. I could have used pistons, but we all know how everyone frowns on those, never mind bud/block dropping issues.
I have a version of this that only counts up. Since that one doesn't have the direction/reset/load logic, its only 2 ticks. I think if it had the load/reset logic and still stay at 2 ticks, it should be perfect for a program counter.
This is an 8 bit version...this can be extended to however many bits you want, it will always stay at 3 ticks. The chests are there to catch the block from the breakers, and there's a transport pipe with extractor/responder chips linked between the placer and chest to keep the placers stocked. That part of the counter has no effect on it's speed, the placers are stocked with a full stack of blocks This could easily be built horizontally as well. I just prefer vertical 'bit slice' designs, this is for a big project I'm working on.
I've done a vertical insta-carry adder using this same technique, and its pretty darned fast too.